1. Field of the Invention
This invention relates to a microstructure array, such as a microlens array that is usable in fields of optoelectronics and the like, a mold or a master of a mold (in the specification the term xe2x80x9cmoldxe2x80x9d is chiefly used in a broad sense including both a mold and a master of a mold) for forming a microstructure array, a fabrication method of the microstructure array, and so forth.
2. Description of the Related Background Art
A microlens array typically has a structure of arrayed minute lenses each having a diameter from about 2 to 3 microns to about 200 or 300 microns and an approximately semispherical profile. The microlens array is usable in a variety of applications, such as liquid-crystal display devices, light receivers and inter-fiber connections in optical communication systems.
Meanwhile, earnest developments have been made with respect to a surface emitting laser and the like which can be readily arranged in an array form at narrow pitches between the devices. Accordingly, there exists a significant need for a microlens array with narrow lens intervals and a large numerical aperture (NA).
Likewise, a light receiving device, such as a charge coupled device (CCD), has been more and more downsized as semiconductor processing techniques develop and advance. Therefore, also in this field, the need for a microlens array with narrow lens intervals and a large NA is increasing. In the field of such a microlens, a desirable structure is a microlens with a large light-condensing efficiency which can highly efficiently utilize light incident on its lens surface.
Further, similar desires exist in prospective fields of optical information processing, such as optical parallel processing-operations and optical interconnections.
Furthermore, display devices of active or self-radiating types, such as electroluminescent (EL) panels, have been enthusiastically studied and developed, and a highly-defined and highly-luminous display has been thus proposed. In such a display, there is a heightened desire for a microlens array which can be produced at a relatively low cost and with a large area as well as with a small lens size and a large NA.
In addition to the above, in a microlens array to be mounted in a liquid crystal projector and the like, an alignment marker for achieving a precise positional alignment between the microlens array and a driver substrate is needed to prevent a decrease in a light-condensing efficiency due to the deviation between the microlens and a pixel and obtain a bright picture image.
There are presently a number of prior art methods for fabricating microlenses. In a prior art microlens-array fabrication method using an ion exchange method (see M. Oikawa, et al., Jpn. J. Appl. Phys. 20(1) L51-54, 1981), a refractive index is raised at plural places in a substrate of multi-component glass by using an ion exchange method. A plurality of lenses are thus formed at high-refractive index places. In this method, however, the lens diameter cannot be large, compared with intervals between lenses. Hence, it is difficult to design a lens with a large NA. Further, the fabrication of a large-area microlens array is not easy since a large scale manufacturing apparatus, such as an ion diffusion apparatus, is required to produce such a microlens array. Moreover, an ion exchange process is needed for each glass, in contrast with a molding method using a mold. Therefore, variations of lens quality, such as a focal length, are likely to increase between lots unless the management of fabrication conditions in the manufacturing apparatus is carefully conducted. In addition to the above, the cost of this method is relatively high, as compared with the method using a mold.
Further, in the ion exchange method, alkaline ions for ion-exchange are indispensable in a glass substrate, and therefore, the material of the substrate is limited to alkaline glass. The alkaline glass is, however, unfit for a semiconductor-based device which needs to be free of alkaline ions. Furthermore, since a thermal expansion coefficient of the glass substrate greatly differs from that of a substrate of a light radiating or receiving device, misalignment between the microlens array and the devices is likely to occur due to a misfit between their thermal expansion coefficients as an integration density of the devices increases.
Moreover, a compressive strain inherently remains on the glass surface which is processed by the ion exchange method. Accordingly, the glass tends to warp, and hence, a difficulty in joining or bonding between the glass and the light radiating or receiving device increases as the size of the microlens array increases.
In another prior art microlens-array fabrication method using a resist reflow (or melting) method (see D. Daly, et al., Proc. Microlens Arrays Teddington., p23-34, 1991), resin formed on a substrate is cylindrically patterned using a photolithography process and a microlens array is fabricated by heating and reflowing the resin. Lenses having various shapes can be fabricated at a low cost by this resist reflow method. Further, this method has no problems of thermal expansion coefficient, warp and so forth, in contrast with the ion exchange method.
In the resist reflow method, however, the profile of the microlens is strongly dependent on the thickness of resin, wetting condition between the substrate and resin, and heating temperature. Therefore, variations between lots are likely to occur while a fabrication reproducibility per a single substrate surface is high.
In another prior art method, an original plate of a microlens is fabricated, lens material is deposited on the original plate and the deposited lens material is then separated. The original plate or mold is fabricated by an electron-beam lithography method (see Japanese Patent Application Laid-Open No. 1(1989) 261601), or a wet etching method (see Japanese Patent Application Laid-Open No. 5(1993)-303009). In these methods, the microlens can be reproduced by molding, variations between lots are unlikely to occur, and the microlens can be fabricated at a low cost. Further, the problems of alignment error and warp due to the difference in the thermal expansion coefficient can be solved, in contrast with the ion exchange method. In the electron-beam lithography method, however, an electron-beam lithographic apparatus is expensive and a large investment in equipment is needed. Further, it is difficult to fabricate a mold having a large area more than 100 cm2 (10 cm-square) because the electron beam impact area is limited.
In yet another prior art method, a mask layer with serially or two-dimensionally arranged openings is formed on a mother substrate, and etching is performed through the openings (see Japanese Patent Application Laid-Open No. 8(1996)-136704). In the method, however, since the etching is conducted through the resist opening, the bottom of a dug portion inevitably becomes flat and it is hence difficult to condense light into an area less than the opening. Further, in a wet etching method, since an isotropic etching using a chemical action is principally employed, formation of the mother substrate into a desired profile cannot be achieved if composition and crystalline structure of the mother substrate vary even slightly.
As a method that solves the above problems, there has been proposed a method in which an array of semispherical structures is formed by electroplating, a mold for a microlens array is then fabricated using the array as a master, and the microlens array is fabricated using the mold (see Japanese Patent Publication No. 64(1989)-10169). In the method, the size of a structure can be enlarged, a fabrication process is easy, controllability is high, and a mold for a microlens array can be fabricated at relatively inexpensive costs. Further, a microlens with a small radius of curvature can be fabricated by electroplating.
As a method of forming an alignment marker, there has been proposed a method in which a pattern for microlenses and a pattern for the alignment marker are formed during the same process when a resist pattern is formed (see Japanese Patent Application Laid-Open No. 9(1997)-189901).
However, where patterns for microlenses and the alignment marker are formed during the same process and electroplating is then conducted (a combination of methods of Japanese Patent Application Laid Open No. 9(1997)-189901 and Japanese Patent Publication No. 64(1989)-10169), an uneven distribution of a current density is likely to appear due to the pattern shape of the alignment marker, and an electric field is thickened and a growth of electroplating is too strongly promoted at the periphery of the array pattern. Thus, the size of the semispherical structure becomes uneven.
It is an object of the present invention to provide a fabrication method of flexibly and readily fabricating a microstructure array which is provided with an alignment marker for achieving a precise alignment, a size distribution of which can be reduced, and a radius of curvature of which can be decreased, a fabrication method of a mold for forming a microstructure array (such as a microlens array, a flyeye lens and a lenticular lens) with an alignment marker, a fabrication method of fabricating a microstructure with an alignment marker using the mold, and a microstructure array which is provided with an alignment marker for achieving a precise alignment. More particularly, it is an object to provide a mold for forming a microlens array with an alignment marker, which can be readily increased in size, readily fabricated with good controllability and at a relatively low cost and have a desired radius of curvature, or which has a large NA. It is an additional object to provide a fabrication method of such a mold, and a fabrication method of the microlens array using the mold. In this specification, the term xe2x80x9cdistributionxe2x80x9d is used as a ratio of a difference between a maximum value and an average value relative to the average value concerning a size or radius of plated or electrode posited layers in a certain region. A current density distribution also has a similar meaning.
The present invention is generally directed to a fabrication method of a microstructure array, such as a mold for forming a microlens array, which includes:
(a) a step of preparing a substrate at least a portion of which is electrically conductive;
(b) a step of forming a first insulating mask layer on the conductive portion of the substrate;
(c) a step of forming an array of openings for the microstructure array and at least an opening for an alignment marker in the first insulating mask layer during a common process to expose the conductive portion of the substrate at the openings; and
(d) a step of forming first plated or electrodeposited layers in the openings and on the first insulating mask layer using the conductive portion of the substrate as a cathode;
wherein the opening for the alignment marker is surrounded by the array of openings for the microstructure array, and a pattern of the opening for the alignment marker is determined such that a current density distribution at the time of electroplating or electrodeposition in said step (d) can be oppressed.
Specifically, the following constructions can be preferably adopted based on the above fundamental construction.
The shortest distance between the opening for the alignment marker and the opening for the microstructure array is set at no less than the maximum pitch of the array of openings for the microstructure array, and an area ratio of the opening for the alignment marker relative to an area around the opening for the alignment marker surrounded by the array of openings for the microstructure array is set at no more than a half (xc2xd).
When such conditions are satisfied, the current density distribution at the time of electroplating or electrodeposition can be preferably oppressed and the size (height, radius, width, and the like) distribution of the plated or electrodeposited layers can be preferably reduced, and hence, a desired entire structure of microstructure array and alignment marker can be formed.
The first insulating mask layer can be removed. It is not always necessary to remove the first mask layer before forming the following second mask layers, especially when the first mask layer is formed of a material, such as PSG (phospho-silicate glass), which can be firmly fixed to the conductive portion of the substrate. In such a case, the first plated or electrodeposited layers can be continuously formed on the first mask layer.
Second insulating mask layers can be formed over a desired area of the first plated or electrodeposited layers formed on the openings for the microstructure array, and over the first plated or electrodeposited layer for the alignment marker, and the first plated or electrodeposited layers not covered with the second insulating mask layer are then removed and the second insulating mask layers are finally removed. Thereby, the size distribution of the microstructure array can be further decreased. The microstructure array obtained at this stage can be used as a final structure.
The second mask layer may be formed of any inorganic or organic insulating material which is anticorrosive to an etchant to be used in the following step. A thin-film forming method, such as a vacuum-evaporating method, a spin-coat method, and a dip method, can be used as a method for forming the second mask layer. The second mask layer can be formed on selected regions by photolithography and etching. A photoresist may be used as a material of the second mask layer. When the photoresist is used, an etching step of the second mask layer material can be omitted.
As discussed above, it is not always necessary to remove the first mask layer before forming the second mask layer, but a fixation of the second mask layer to the substrate can be strengthened when the first mask layer is removed. When the first and second mask layers are both formed of photoresist, this improvement is large.
The exposed first plated layers can be etched by dry etching or wet etching. The following etching gas or etching liquid can be used. This etching gas or etching liquid etches none of the second mask layer, the electrode layer, and the substrate, but selectively etches the exposed first plated layers.
Herein the exposed first plated layers can be electrolytically etched by applying a voltage using those plated layers as an anode. Where the electrode layer is composed of a material that cannot be electrically etched by the electroplating liquid and that cannot produce an alloy layer with the first plated layer, the electrode layer with a flat surface can be regained after the electrolytic etching is performed. In this case, material of the first plated layers removed by the electrolytic etching can be collected in an electroplating bath or on an opposite metal electrode, and therefore, the material of the first plated layers can be reused without waste. Thereby, even when a precious metal is used, fabrication costs can be reduced.
The array of openings for the microstructure array and the openings for the alignment marker formed in the first insulating mask layer can constitute a common array of openings formed in the first insulating mask layer, and in this case the second insulating mask layers are formed over a desired area of the first plated or electrodeposited layers formed on the openings in the common array for the microstructure array, and over at least two first plated or electrodeposited layers formed on the openings in the common array for the alignment marker outside the openings in the common array for the microstructure array. Thereby, the pattern of the alignment marker can be flexibly and readily set according to its application, since the second mask layer for the alignment marker only needs to be formed on a selected region of the first plated or electrodeposited layers formed on the openings in the common array.
A second plated or electrodeposited layer can be preferably formed over the first plated or electrodeposited layers for the microstructure array and the alignment marker. Thereby, the size distribution of the microstructure array can be further reduced, and the first plated or electrodeposited layers can be firmly fixed to the conductive portion or the first mask layer.
The second plated layer can be formed by either electroplating or electroless plating. When the electroless plating is used, a brightened mold for a microstructure array can be obtained. Further, since the electroless plating is an isotropic growth method, radii of curvature of each plated layer can be further equalized in its diagonal and horizontal directions and heights of the plated layers can also be further equalized between areas for the microstructure array and the alignment marker.
A diameter or a shorter width of the opening for the alignment marker is preferably no more than a diameter or a width of the opening for the microstructure array, so that the current density distribution at the time of electroplating or electrodeposition can be preferably oppressed. The opening for the microstructure array may be circular, slit-shaped, elongated stripe-shaped, or the like. A semispherical or semicylindrical microstructure can be formed, for example. The opening for the alignment marker may be circular, annular, square, rectangular, or the like. The pattern of the openings for the alignment marker can take various types of a crisscross pattern, for example. Those are determined according to applications of the microstructure array.
Further, the present invention is generally directed to a microstructure array, such as a mold for forming a microlens array, which includes a substrate at least a portion of which is electrically conductive, a first insulating mask layer formed on the conductive portion of the substrate, an array of first plated or electrodeposited layers formed on the conductive portion of the substrate, and at least a first plated or electrodeposited layer for an alignment marker formed on the conductive portion of the substrate. The first plated or electrodeposited layer for the alignment marker is surrounded by the array of first plated or electrodeposited layers, and the pattern of the first plated or electrodeposited layer for the alignment marker is determined such that a current density distribution at the time of forming the array of first plated or electrodeposited layers and the first plated or electrodeposited layer for the alignment marker by electroplating or electrodeposition can be oppressed.
A first insulating mask layer with an array of openings for the microstructure array and at least an opening for the alignment marker formed on the conductive portion of the substrate may be further provided in the above fundamental structure. Herein, the shortest distance between the opening for the alignment marker and the opening for the microstructure array is set at no less than the maximum pitch of the array of openings for the microstructure array, and an area ratio of the opening for the alignment marker relative to an area around the opening for the alignment marker surrounded by the array of openings for the microstructure array is set at no more than a half (xc2xd).
Alternatively, the array of openings for the microstructure array and the openings for the alignment marker formed in the first insulating mask layer can constitute a common array of openings formed in the first insulating mask layer, and in this case the first plated or electrodeposited layers are left only in a desired area of the first plated or electrodeposited layers formed on the openings in the common array for the microstructure array, and in an area of at least two first plated or electrodeposited layers formed on the openings in the common array for the alignment marker outside the openings in the common array for the microstructure array.
In the above fundamental structure, only the first plated or electrodeposited layers in a desired area of the array of first plated or electrodeposited layers and at least a first plated or electrodeposited layer for the alignment marker is preferably left with other first plated or electrodeposited layers being removed
A second plated or electrodeposited layer is preferably formed over the first plated or electrodeposited layers for the microstructure array and the alignment marker.
Furthermore, the present invention is generally directed to a microstructure array, such as a mold for forming a microlens array, which includes a substrate at least a portion of which is electrically conductive, a first insulating mask layer formed on the conductive portion of the substrate, an array of first plated or electrodeposited layers formed on the conductive portion of the substrate, at least a first plated or electrodeposited layer for an alignment marker formed on the conductive portion of the substrate, and a second plated or electrodeposited layer formed over the first plated or electrodeposited layers for the microstructure array and the alignment marker. The first plated or electrodeposited layer for the alignment marker is surrounded by the array of first plated or electrodeposited layers, and a pattern of the first plated or electrodeposited layer for the alignment marker is determined such that a current density distribution at the time of forming the array of first plated or electrodeposited layers and the first plated or electrodeposited layer for the alignment marker by electroplating or electrodeposition can be oppressed.
A profile of the first plated or electrodeposited layer of the array of first plated or electrodeposited layers may be different from or the same as a profile of the first plated or electrodeposited layer for the alignment marker.
Also herein, only the first plated or electrodeposited layers in a desired area of the array of first plated or electrodeposited layers and the first plated or electrodeposited layer for the alignment marker are preferably left.
These advantages, as well as others will be more readily understood in connection with the following detailed description of the preferred embodiments of the invention in connection with the drawings.